? semiconductor components industries, llc, 2011 may, 2011 ? rev. 6 1 publication order number: mc74vhc125/d mc74vhc125 quad bus buffer with 3 ? state control inputs the mc74vhc125 is a high speed cmos quad bus buffer fabricated with silicon gate cmos technology. it achieves high speed operation similar to equivalent bipolar schottky ttl while maintaining cmos low power dissipation. the mc74vhc125 requires the 3 ? state control input (oe ) to be set high to place the output into the high impedance state. the internal circuit is composed of three stages, including a buffer output which provides high noise immunity and stable output. the inputs tolerate voltages up to 7 v, allowing the interface of 5 v systems to 3 v systems. ? high speed: t pd = 3.8ns (typ) at v cc = 5 v ? low power dissipation: i cc = 4 a (max) at t a = 25 c ? high noise immunity: v nih = v nil = 28% v cc ? power down protection provided on inputs ? balanced propagation delays ? designed for 2 v to 5.5 v operating range ? low noise: v olp = 0.8 v (max) ? pin and function compatible with other standard logic families ? latchup performance exceeds 300 ma ? esd performance: human body model; > 2000 v, machine model; > 200 v ? chip complexity: 72 fets or 18 equivalent gates ? these devices are pb ? free and are rohs compliant 14 ? lead soic d suffix case 751a 14 ? lead tssop dt suffix case 948g pin connection and marking diagram (top view) device package shipping ordering information MC74VHC125DG soic 55 units/rail mc74vhc125dtr2g tssop 2500 units/reel 14 ? lead soic eiaj m suffix case 965 mc74vhc125mg soic eiaj 50 units/rail 11 12 13 14 8 9 10 5 4 3 2 1 7 6 oe3 y4 a4 oe4 v cc y3 a3 oe2 y1 a1 oe1 gnd y2 a2 http://onsemi.com see general marking information in the device marking section on page 6 of this data sheet. device marking information mc74vhc125dr2g soic 2500 units/reel mc74vhc125melg soeiaj 2000 units/reel
mc74vhc125 http://onsemi.com 2 logic diagram active ? low output enables y1 y2 y4 3 6 8 11 13 12 10 9 4 5 1 2 a1 oe1 a2 oe2 a3 oe3 a4 oe4 y3 function table vhc125 inputs output aoe y hl h ll l xh z ??????????????????????? maximum ratings* ???? ???? ?????????????? ?????????????? ?????? ?????? ?? ?? ???? ???? v cc ?????????????? ?????????????? ?????? ?????? ?? ?? ???? ???? ?????????????? ?????????????? ?????? ?????? ?? ?? ???? ???? ?????????????? ?????????????? ?????? ?????? ?? ?? ???? ???? ?????????????? ?????????????? ?????? ?????? ? 20 ?? ?? ???? ???? ?????????????? ?????????????? ?????? ?????? 20 ?? ?? ???? ???? ?????????????? ?????????????? ?????? ?????? 25 ?? ?? ???? ???? ?????????????? ?????????????? ?????? ?????? 50 ?? ?? ???? ???? ???? ?????????????? ?????????????? ?????????????? ?????? ?????? ?????? ?? ?? ?? ???? ???? ?????????????? ?????????????? ?????? ?????? ?? ?? c ** absolute maximum continuous ratings are those values beyond which damage to the device may occur. exposure to these condition s or conditions beyond those indicated may adversely affect device reliability. functional operation under absolute ? maximum ? rated conditions is not implied. ?derating ? soic packages: ? 7 mw/ c from 65 to 125 c tssop package: ? 6.1 mw/ c from 65 to 125 c recommended operating conditions ???? ???? ??????????????????????? ??????????????????????? ???? ???? ???? ???? ?? ?? ???? ???? v cc ??????????????????????? ??????????????????????? ???? ???? ???? ???? ?? ?? ???? ???? ??????????????????????? ??????????????????????? ???? ???? ???? ???? ?? ?? ???? ???? ??????????????????????? ??????????????????????? ???? ???? ???? ???? ?? ?? ???? ???? ??????????????????????? ??????????????????????? ???? ???? ? 55 ???? ???? ?? ?? c ???? ???? ???? ??????????????????????? ??????????????????????? ??????????????????????? 0.3 v v cc =5.0 v 0.5 v ???? ???? ???? ???? ???? ???? ?? ?? ?? ? im- pedance circuit. for proper opera- tion, v in and v out should be con- strained to the range gnd (v in or v out ) v cc . unused inputs must always be tied to an appropriate logic voltage level (e.g., either gnd or v cc ). un- used outputs must be left open.
mc74vhc125 http://onsemi.com 3 dc electrical characteristics v cc t a = 25 c t a 85 c t a 125 c symbol parameter test conditions (v) min typ max min max min max unit v ih minimum high ? level input voltage 2.0 3.0 4.5 5.5 1.5 2.1 3.15 3.85 1.5 2.1 3.15 3.85 1.5 2.1 3.15 3.85 v v il maximum low ? level input voltage 2.0 3.0 4.5 5.5 0.5 0.9 1.35 1.65 0.5 0.9 1.35 1.65 0.5 0.9 1.35 1.65 v v oh minimum high ? level output voltage v in = v ih or v il v in = v ih or v il i oh = ? 50 a 2.0 3.0 4.5 1.9 2.9 4.4 2.0 3.0 4.5 1.9 2.9 4.4 1.9 2.9 4.4 v v in = v ih or v il i oh = ? 4 ma i oh = ? 8 ma 3.0 4.5 2.58 3.94 2.48 3.80 2.34 3.66 v v ol maximum low ? level output voltage v in = v ih or v il v in = v ih or v il i ol = 50 a 2.0 3.0 4.5 0.0 0.0 0.0 0.1 0.1 0.1 0.1 0.1 0.1 0.1 0.1 0.1 v v in = v ih or v il i ol = 4 ma i ol = 8 ma 3.0 4.5 0.36 0.36 0.44 0.44 0.52 0.52 v i oz maximum 3 ? state leakage current v in = v ih or v il v out = v cc or gnd 5.5 0.2 5 2.5 2.5 a i in maximum input leakage current v in = 5.5v or gnd 0 to 5.5 0.1 1.0 1.0 a i cc maximum quiescent supply current v in = v cc or gnd 5.5 4.0 40 40 a
mc74vhc125 http://onsemi.com 4 ????????????????????????????????? ????????????????????????????????? (input t r = t f = 3.0 ns) ???? ???? ???? ???? symbol ????????? ????????? ????????? ????????? ????????? ????????? ????????? ????????? ?????? ?????? ?????? c ???? ???? ???? 85 c ????? ????? ????? 125 c ?? ?? ?? ?? ?? ?? ??? ??? ??? ??? ??? ??? ?? ?? ??? ??? ??? ??? ???? ???? ???? ???? t plh , t phl ????????? ????????? ????????? ????????? ????????? ????????? 0.3v c l = 15 pf c l = 50 pf ?? ?? ??? ??? ??? ??? ??? ??? ?? ?? ??? ??? ??? ??? ?? ?? ?? ?? ????????? ????????? ????????? 0.5v c l = 15 pf c l = 50 pf ?? ?? ?? ??? ??? ??? ??? ??? ??? ??? ??? ??? ?? ?? ?? ??? ??? ??? ??? ??? ??? ???? ???? ???? ???? ????????? ????????? ????????? ????????? ????????? ????????? ????????? 0.3v c l = 15 pf r l = 1 k c l = 50 pf ?? ?? ?? ??? ??? ??? ??? ??? ??? ??? ??? ??? ?? ?? ?? ??? ??? ??? ??? ??? ??? ?? ?? ?? ?? ????????? ????????? 0.5v c l = 15 pf r l = 1 k c l = 50 pf ?? ?? ??? ??? ??? ??? ??? ??? ?? ?? ??? ??? ??? ??? ???? ???? ???? ???? ???? ????????? ????????? ????????? ????????? ????????? ????????? ????????? ????????? 0.3v c l = 50 pf r l = 1 k ?? ?? ?? ??? ??? ??? 9.5 ??? ??? ??? ??? ??? ??? ?? ?? ?? ??? ??? ??? ??? ??? ??? ?? ?? ?? ?? ?? ????????? ????????? ????????? 0.5v c l = 50 pf r l = 1 k ?? ?? ?? ??? ??? ??? 6.1 ??? ??? ??? ??? ??? ??? ?? ?? ?? ??? ??? ??? ??? ??? ??? ???? ???? ???? ???? ????????? ????????? ????????? ????????? ? to ? output skew ????????? ????????? 0.3v c l = 50 pf (note 1) ?? ?? ??? ??? ??? ??? ??? ??? ?? ?? ??? ??? ??? ??? ?? ?? ?? ?? ????????? ????????? ????????? 0.5v c l = 50 pf (note 1) ?? ?? ?? ??? ??? ??? ??? ??? ??? ??? ??? ??? ?? ?? ?? ??? ??? ??? ??? ??? ??? ???? ???? ????????? ????????? ????????? ????????? ?? ?? ??? ??? ??? ??? ??? ??? ?? ?? ??? ??? ??? ??? ?? ?? ???? ???? ???? ????????? ????????? ????????? ? state output capacitance (output in high impedance state) ????????? ????????? ????????? ?? ?? ?? ??? ??? ??? ??? ??? ??? ??? ??? ??? ?? ?? ?? ??? ??? ??? ??? ??? ??? ?? ?? ?? typical @ 25 c, v cc = 5.0 v pf 14 1. parameter guaranteed by design. t oslh = |t plhm ? t plhn |, t oshl = |t phlm ? t phln |. 2. c pd is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption with out load. average operating current can be obtained by the equation: i cc(opr ) = c pd v cc f in + i cc / 4 (per buffer). c pd is used to determine the no ? load dynamic power consumption; p d = c pd v cc 2 f in + i cc v cc . noise characteristics (input t r = t f = 3.0 ns, c l = 50 pf, v cc = 5.0 v) symbol characteristic t a = 25 c unit typ max v olp quiet output maximum dynamic v ol 0.3 0.8 v v olv quiet output minimum dynamic v ol ? 0.3 ? 0.8 v v ihd minimum high level dynamic input voltage 3.5 v v ild maximum low level dynamic input voltage 1.5 v
mc74vhc125 http://onsemi.com 5 switching waveforms figure 1. figure 2. y 50% 50% v cc 50% v cc v cc gnd high impedance v ol + 0.3v v oh - 0.3v y y oe t pzl t plz t pzh t phz *includes all probe and jig capacitance c l * test point device under test output figure 3. test circuit *includes all probe and jig capacitance figure 4. test circuit output test point c l * 1 k connect to v cc when testing t plz and t pzl. connect to gnd when testing t phz and t pzh. device under test high impedance 50% 50% v cc v cc gnd t plh t phl a figure 5. input equivalent circuit input
mc74vhc125 http://onsemi.com 6 marking diagrams (top view) 14 ? lead soic d suffix case 751a 14 ? lead tssop dt suffix case 948g 13 14 12 11 10 9 8 2 1 34567 13 14 12 11 10 9 8 2 1 34567 14 ? lead soic eiaj m suffix case 965 13 14 12 11 10 9 8 2 1 34567 vhc125 vhc awlyww* 125 alyw* *see applications note and8004/d for date code and traceability information. vhc125 awlyww*
mc74vhc125 http://onsemi.com 7 package dimensions soic ? 14 case 751a ? 03 issue j notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: millimeter. 3. dimensions a and b do not include mold protrusion. 4. maximum mold protrusion 0.15 (0.006) per side. 5. dimension d does not include dambar protrusion. allowable dambar protrusion shall be 0.127 (0.005) total in excess of the d dimension at maximum material condition. ? a ? ? b ? g p 7 pl 14 8 7 1 m 0.25 (0.010) b m s b m 0.25 (0.010) a s t ? t ? f r x 45 seating plane d 14 pl k c j m dim min max min max inches millimeters a 8.55 8.75 0.337 0.344 b 3.80 4.00 0.150 0.157 c 1.35 1.75 0.054 0.068 d 0.35 0.49 0.014 0.019 f 0.40 1.25 0.016 0.049 g 1.27 bsc 0.050 bsc j 0.19 0.25 0.008 0.009 k 0.10 0.25 0.004 0.009 m 0 7 0 7 p 5.80 6.20 0.228 0.244 r 0.25 0.50 0.010 0.019 7.04 14x 0.58 14x 1.52 1.27 dimensions: millimeters 1 pitch soldering footprint 7x
mc74vhc125 http://onsemi.com 8 package dimensions tssop ? 14 case 948g ? 01 issue b dim min max min max inches millimeters a 4.90 5.10 0.193 0.200 b 4.30 4.50 0.169 0.177 c ??? 1.20 ??? 0.047 d 0.05 0.15 0.002 0.006 f 0.50 0.75 0.020 0.030 g 0.65 bsc 0.026 bsc h 0.50 0.60 0.020 0.024 j 0.09 0.20 0.004 0.008 j1 0.09 0.16 0.004 0.006 k 0.19 0.30 0.007 0.012 k1 0.19 0.25 0.007 0.010 l 6.40 bsc 0.252 bsc m 0 8 0 8 notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: millimeter. 3. dimension a does not include mold flash, protrusions or gate burrs. mold flash or gate burrs shall not exceed 0.15 (0.006) per side. 4. dimension b does not include interlead flash or protrusion. interlead flash or protrusion shall not exceed 0.25 (0.010) per side. 5. dimension k does not include dambar protrusion. allowable dambar protrusion shall be 0.08 (0.003) total in excess of the k dimension at maximum material condition. 6. terminal numbers are shown for reference only. 7. dimension a and b are to be determined at datum plane ? w ? . s u 0.15 (0.006) t 2x l/2 s u m 0.10 (0.004) v s t l ? u ? seating plane 0.10 (0.004) ? t ? ??? ??? ??? section n ? n detail e j j1 k k1 ? w ? 0.25 (0.010) 8 14 7 1 pin 1 ident. h g a d c b s u 0.15 (0.006) t ? v ? 14x ref k n n 7.06 14x 0.36 14x 1.26 0.65 dimensions: millimeters 1 pitch soldering footprint
mc74vhc125 http://onsemi.com 9 package dimensions soeiaj ? 14 case 965 ? 01 issue b h e a 1 dim min max min max inches --- 2.05 --- 0.081 millimeters 0.05 0.20 0.002 0.008 0.35 0.50 0.014 0.020 0.10 0.20 0.004 0.008 9.90 10.50 0.390 0.413 5.10 5.45 0.201 0.215 1.27 bsc 0.050 bsc 7.40 8.20 0.291 0.323 0.50 0.85 0.020 0.033 1.10 1.50 0.043 0.059 0 0.70 0.90 0.028 0.035 --- 1.42 --- 0.056 a 1 h e q 1 l e 10 0 10 l e q 1 notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: millimeter. 3. dimensions d and e do not include mold flash or protrusions and are measured at the parting line. mold flash or protrusions shall not exceed 0.15 (0.006) per side. 4. terminal numbers are shown for reference only. 5. the lead width dimension (b) does not include dambar protrusion. allowable dambar protrusion shall be 0.08 (0.003) total in excess of the lead width dimension at maximum material condition. dambar cannot be located on the lower radius or the foot. minimum space between protrusions and adjacent lead to be 0.46 ( 0.018). 0.13 (0.005) m 0.10 (0.004) d z e 1 14 8 7 e a b view p c l detail p m a b c d e e l m z on semiconductor and are registered trademarks of semiconductor components industries, llc (scillc). scillc reserves the right to mak e changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for an y particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including wi thout limitation special, consequential or incidental damages. ?typical? parameters which may be provided in scillc data sheets and/or specifications can and do vary in different application s and actual performance may vary over time. all operating parameters, including ?typicals? must be validated for each customer application by customer?s technical experts. scillc does not convey any license under its patent rights nor the rights of others. scillc products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the scillc product could create a sit uation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer shall indemnify and hold scillc and its of ficers, employees, subsidiaries, af filiates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, direct ly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that scillc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employer. this literature is subject to all applicable copyright laws and is not for resale in any manner. publication ordering information n. american technical support : 800 ? 282 ? 9855 toll free usa/canada europe, middle east and africa technical support: phone: 421 33 790 2910 japan customer focus center phone: 81 ? 3 ? 5773 ? 3850 mc74vhc125/d literature fulfillment : literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone : 303 ? 675 ? 2175 or 800 ? 344 ? 3860 toll free usa/canada fax : 303 ? 675 ? 2176 or 800 ? 344 ? 3867 toll free usa/canada email : orderlit@onsemi.com on semiconductor website : www.onsemi.com order literature : http://www.onsemi.com/orderlit for additional information, please contact your local sales representative
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